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SN74LS74AN Dual D Flip-Flop IC

SN74LS74AN是双重的D flip-flopmanufactured by Texas Instruments containing two independent positive-edge triggered D flip-flops with set and reset inputs. TheSN74 familyis characterized for operation from 0 °C to 70 °C.

SN74LS74AN PINOUT配置

Pin Number

Pin Name

Description

14

VCC

Supply voltage, 5V nominal

1, 13

SN74LS74AN CLR Pin

Clear input, equivalent to reset

2, 12

D

Data input

3, 11

CLK

Clock input, rising edge triggered

4, 10

SN74LS74AN PRE Pin

Preset input, equivalent to set

5,9

Q

Output

6, 8

SN74LS74AN PRE Pin

Inverted output

7

GND

IC ground reference

Features and Specifications

  • Dual D flip-flops in the same package
  • Positive edge-triggered
  • Preset and Clear inputs

Note:Complete technical details can be found in theSN74LS74AN datasheet在此页面末尾链接。

SN74LS74AN Equivalents

74HC74, 74HCT74

Other D Flip-Flops

CD4013

How To Use SN74LS74AN?

The SN74LS74AN is adual D-type positive edge-triggered flip-flopwith set and clear inputs.

SN74LS74AN电路图

A flip-flop is a basic ‘memory’ circuit – the output remembers the previous input state unless the power to the IC is turned off. Data is fed into the D pin (D for data), and when the chip registers a rising edge on the CLK (clock) pin, the data is transferred to the Q andSN74LS74AN PRE Pinpins. After this, any input on the D pin does not get transferred to the output pins unless there is once again a rising edge on the CLK pin.

The CLK pin is usually fed with a periodic clock signal, and this can be used to synchronize external inputs to a clocked synchronous circuit.

The SN74LS74AN also comes withSN74LS74AN PRE PinandSN74LS74AN CLR Pin销钉,相当于常规触发器上的集合和重置销钉。在此芯片上,这两个输入覆盖了D和clk引脚 - 无论其状态如何SN74LS74AN PRE Pinlow turns Q high andSN74LS74AN PRE Pinlow, and settingSN74LS74AN CLR Pinlow turns Q low andSN74LS74AN PRE Pinhigh. If these pins are not used, they can be tied to VCC.

D Flip Flop Timing Diagram

The ‘LS’ in the part number means low-power Schottky, meaning that the transistors that make up the IC are NPN transistors with a base-collector Schottky diode that prevents saturation and speeds up the transistor. This also means that the input logic thresholds are 0.8V for low and 2V for high respectively, which might not be compatible with other logic ICs, care should be taken while interfacing ICs between logic families.

申请

  • Data storage
  • Data synchronization
  • Quadrature generator

2D Model and Dimensions

If you are designing a PCB or Perf board with this component then the following picture from the Datasheet will be useful to know its package type and dimensions.

SN74LS74AN D Flip-Flop Dimensions

Component Datasheet

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